Referring to FIG. 1, a known current source circuit is shown for generating a current I having stable value for use in an integrated circuit. The circuit comprises a voltage divider network R1, R2 connected between supply rail VDD and reference potential rail GND providing a reference voltage V at node B coupled to the inverting input of an operational amplifier A. The output of the amplifier is coupled to the gate of transistor 2 and the gates of transistors 4,6. The transistor 2 is connected via a connection node IN to a current sink device and supplies current I thereto. The current sink device comprises an externally mounted resistor R of precise value. Connection node IN is coupled to the non-inverting input of amplifier A. Amplifier A ensures that the voltage at the non-inverting input of the amplifier will also be V, hence the current I through the resistor R will be precisely determined as V/R. Currents flowing through transistors 4, 6 which are coupled to loads (not shown) are proportional to current I and constitute the output of the circuit. The operational amplifier A is realised in CMOS technology and includes a current source 8 within the tail of a differential pair of transistors 10, 12 forming the input stage of the amplifier.
In the following description of the drawings, similar parts to those of FIG. 1 are denoted by the same reference numerals.
To ensure accuracy of operation and to ease constraints on the operational amplifier used in the circuit shown in FIG. 1, the arrangement shown in FIG. 2 is frequently employed. The current source 8 is provided by a transistor 20 controlled via transistors 4, 22 in a current mirror arrangement. The problem with this arrangement is that it may not start up upon initial switch on, since the drive for the current source 8 is dependent upon the output of the amplifier.
In order to ensure switch on the circuit of FIG. 2, the start up arrangement as shown in FIG. 3 has been used in the past. As shown in FIG. 3 transistors 30 and 32 are connected between the power supply VDD and ground GND with the gate of transistor 30 coupled to the reference potential. This ensures that transistors 30 and 32 carry current at start up. Current through transistor 32 is mirrored by a transistor 34 which is coupled in parallel with transistor 20 to ensure that the amplifier has start up current upon switch on of the device A. Transistor 36 is provided in order to switch off transistor 34 upon switch on of the device.
The arrangement shown in FIG. 3 has, however, the disadvantage that transistors 30 and 36 remain on throughout the operation of the comparator increasing overall power consumption in the device. Another disadvantage of the described comparator is that the on chip voltage divider R1,R2 generating reference voltage V contributes also to power consumption even if the comparator is not in use, i.e. when node IN is not connected to resistor R.